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[求助] Tessent ATPG Simulation Mismatch Debug risccpu 2015-9-4 43531 xdxy0531 2018-6-14 11:00
ADS Schematic Capture and Layout attachment  ...23 downloadrob 2008-12-16 268211 hypear 2018-6-13 21:39
[资料] wave VCD Viewer attachment  ...23 xiaojj2005 2010-3-6 289884 meek 2018-6-13 16:49
[资料] Analog Circuit Design:A Tutorial Guide to Applications and Solutions attach_img  ...23456..9 uestcqlm 2011-12-24 8022585 quhuaibo 2018-6-13 07:16
Magic版图设计教程 attachment  ...2 ninimax 2005-4-30 166406 okguy 2018-6-13 03:02
基于fpga电子秒表设计 attachment nieccyyy 2008-12-11 42528 1937cuicuicui23 2018-6-12 16:07
[转贴] 发个资料吧《使用TIMEQUEST进行简单粗糙的约束》 attachment guantouren 2011-11-10 63925 iNostory 2018-6-12 13:25
Microelectronic Devices and Circuits(mit) attachment  ...23 gdarboux 2007-1-2 286968 quhuaibo 2018-6-12 12:23
[求助] Die Revision mzz007 2018-6-12 01653 mzz007 2018-6-12 11:04
[求助] Verilog数字VLSI设计教程光盘内容 勇敢的小牛 2018-6-12 01934 勇敢的小牛 2018-6-12 09:11
[转贴] Altera的license破解器6.0-9.1大全(包括Quartus II+NIOS II+DSP Builder) attachment  ...23456..32 suns 2009-11-16 31257279 zieen 2018-6-12 00:10
FPGA器件的仿真验证_设计约束_时序分析与状态机设计技巧 attachment  ...23456..16 amin2008 2008-6-21 15921636 iNostory 2018-6-11 20:47
将ABEL语言改写为VHDL(Cypress) attachment hryancool 2006-12-10 24209 sdc 2018-6-11 16:47
[资料] GCNMOS结构电源和地之间的ESD保护电路设计 attachment  ...2 zjl840928 2011-9-1 164980 cisse 2018-6-11 16:43
FPGA调试工具chipscope/静态时序分析与逻辑设计 attachment  ...23456..12 dragonking 2008-6-29 11418293 honglin23 2018-6-10 10:50
[原创] EDA for IC System Design, Verification, and Testing attachment  ...2 h9f3 2017-10-23 174288 quhuaibo 2018-6-10 08:39
Cadence Verilog 培训教材 attachment  ...23 jacocobi 2008-7-14 248085 ipex 2018-6-9 20:20
[资料] Verilog寄存器传输级培训资料 attachment  ...2 pwy122 2011-9-9 114166 opqfeixue122 2018-6-9 14:25
[原创] Aldec Active-HDL 10.1-10.3 worked medicine for LOW price. attachment zxw227ekat 2017-12-4 63247 雪鹰 2018-6-8 23:24
[奥本海姆]数字信号处理(第二版) attachment  ...23456 ad1122 2007-4-9 5114884 shuorenqi 2018-6-8 23:16
Programmable Logic Design Quick Start Guide attachment sqwang1983 2008-9-19 36189 cikulangsat 2018-6-8 22:30
[资料] NETFPGA attachment tengzhaoyu 2016-6-29 12107 mangotango 2018-6-7 21:34
[原创] 可替换xilinx定制的同步fifo,用于asic设计 attachment  ...2 周建伟 2014-2-21 123905 iNostory 2018-6-7 17:47
[原创] Verilog HDL 倒计时器程序 attachment  ...2 fuwenjun 2009-12-29 146963 iNostory 2018-6-7 11:48
[求助] 那有CHROMA RESAMPLER XLINUX IP license oibioice 2015-6-8 22067 z6457658f 2018-6-6 20:05
根据Dc_compiler的User_guide里面的例子与教程[方便懒人] attachment  ...23 orangercat 2009-10-12 266358 echo123 2018-6-6 16:33
[资料] 精彩好书:Synthesizable VHDL Design for FPGAs attach_img  ...2 3082703297 2018-5-26 103402 jimcmwang 2018-6-6 15:49
mif文件生成 attachment renninger1 2009-5-23 92933 xingye777 2018-6-6 10:04
[超级经典]Detection, Estimation, and Modulation Theory Part I attachment  ...2 yingxionga 2007-4-2 134199 zxcsdfert 2018-6-5 22:06
[资料] Nios ii 软件调试技巧 attachment  ...2 wwt142857 2010-8-11 194387 iNostory 2018-6-5 18:38
FPGA调试工具chipscope (中文教程) attachment  ...23456..37 sqwang1983 2008-9-19 36549374 iNostory 2018-6-5 18:01
[原创] How to upload prabakaran_4321 2018-5-31 12067 besarkecil 2018-6-5 11:52
[原创] Design and Verification prabakaran_4321 2018-5-31 21337 besarkecil 2018-6-5 11:49
Verilog代码美化工具 attachment  ...23456..7 hsdy 2008-4-9 6412941 guoweituo 2018-6-4 21:51
[资料] [systemC ebook]Quality-Driven SystemC Design attachment  ...2 悉你 2010-11-13 174151 xphoenix 2018-6-4 17:53
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