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[资料] Verilog HDL Design Examples 新人帖 attach_img  ...23 patrickpan 2023-1-29 284091 xdmicro 2023-2-27 14:06
[原创] 求Infineon 的SPI芯片设计手册 新人帖 E.E.T.O.P 2023-2-27 01241 E.E.T.O.P 2023-2-27 11:04
[资料] 施普林格2018年新书Design of FPGA-Based Computing Systems with OpenCL attachment  ...23456..12 liuyiwen 2018-4-18 11926252 lixiaohui1215 2023-2-27 09:50
[资料] FPGA Prototyping By Verilog Examples Xilinx Spartan-3 Version attach_img  ...2 Liyanghua 2016-3-16 115617 wulin98 2023-2-27 09:30
[资料] Clifford E. Cummings论文集分享!!! 新人帖 attachment beita 2021-8-10 41821 voild 2023-2-26 18:40
最新H264标准 attachment dragontown 2009-9-3 82708 etopjp 2023-2-26 15:00
H264_standard attachment  ...2 yoarst 2007-3-26 115551 etopjp 2023-2-26 14:57
[资料] Digital Design and Computer Architecture第二版习题答案 attachment  ...23 fgg1991 2016-1-14 248688 wulin98 2023-2-26 12:52
[资料] 串口Verilog程序模块 attachment  ...234 影落红尘 2014-6-1 3910154 崽袈窝 2023-2-25 15:40
[资料] UART串口—verilog VHDL attachment  ...23456..8 forecyk 2010-4-18 7923972 崽袈窝 2023-2-25 15:31
[原创] EXCEL2RAL - EXCEL格式寄存器REGISTER描述文件转换为SYNOPSYS RAL格式 attachment zhangguo1286 2017-5-13 94732 lover2012 2023-2-25 13:56
[资料] Verdi+TetraMax+FM+DFT attachment  ...2 gavina_zhao 2020-3-4 154488 wjw1997 2023-2-24 15:54
tmax 的命令help attachment  ...2 liwenbin4756 2008-6-12 155615 wjw1997 2023-2-24 15:34
[资料] 数字全流程 attachment  ...2 hebut_wolf 2010-3-7 135583 刚叔家的小娘子 2023-2-23 15:31
FPGA Compiler II FPGA Express Verilog HDL Reference Manual attachment bgsony 2007-8-10 62613 iceinsky 2023-2-23 14:46
UltraEdit-32 SystemVerilog高亮文件 attachment  ...23456..10 chkmin 2008-8-26 9125518 suifengzjp 2023-2-23 10:27
[资料] Verilog by Example A Concise Introduction for FPGA Design (Blaine Readler) attachment  ...2 RSTZYP 2022-11-20 143350 cdting 2023-2-22 20:32
[资料] Constraining Designs for Synthesis and Timing Analysis attachment  ...23 hfyfpga 2014-5-5 228065 smnq0524 2023-2-22 18:12
[招聘] 数字前端设计 Claire. 2023-2-22 02143 Claire. 2023-2-22 17:28
[资料] 好書分享:Tree-based Heterogeneous FPGA Architectures attach_img  ...23 leeming 2014-3-15 218437 test_alan 2023-2-22 15:32
2004Prentice Hall五星书 -Advanced Digital Design With The Verilog Hdl attachment  ...23456..26 woainio 2008-6-24 25943657 cdting 2023-2-22 11:50
[资料] 2010 Prentice Hall五星书 -Advanced Digital Design With The Verilog Hdl (第二版) attachment  ...23456..10 zhouyihuan100 2011-10-9 9125788 cdting 2023-2-22 11:49
[招聘] 上市公司,坐标深圳西安 - IC设计 Allison_7 2023-2-22 12310 Allison_7 2023-2-22 11:23
精通VerilogHDL:IC设计核心技术实例详解(源代码) attachment  ...2345 lang5312 2008-9-21 4711825 Jesin 2023-2-22 10:05
[资料] 经典AI芯片系列1--MIT Eyeriss attachment jl1374141105 2022-12-7 31577 willtuna 2023-2-22 00:06
[资料] SAS Command Set Manuals attachment Somniator 2021-2-8 82713 Thompson 2023-2-21 16:15
[资料] FPGA数字信号处理实现原理及方法 attachment  ...23456..8 zjxing 2016-6-5 7117648 smaa 2023-2-21 13:45
[资料] arbiter设计详解 attachment  ...2 jl1374141105 2023-2-15 133489 伪界 2023-2-21 13:45
power of TCL1 - lab guide attachment  ...2 brianliu 2006-9-1 165815 wangli_peking 2023-2-21 11:24
[原创] Synthesize Cortex M0 SOC 、 Download to FPGA and link to Keil with SWD dodoee 2023-1-16 21602 ayamitek 2023-2-21 09:03
[原创] 整理的soc设计相关资料,springer出版 attach_img  ...2 juhuapaul 2021-3-1 195220 demonyh 2023-2-20 22:55
[资料] Digital Signal Processing (4th Edition) attachment  ...23456 JerryRaphael 2021-7-19 5011392 菜鸟要飞 2023-2-20 15:01
[资料] RISCV Vector extension attachment jl1374141105 2022-12-5 81748 Ralphjh 2023-2-20 11:46
[资料] Tips and Techniques on Static Timing Analysis (fix untested point) attachment  ...2345 QQEDA 2012-5-31 4510179 wangli_peking 2023-2-20 09:35
[资料] synopsys dft流程培训资料 attachment  ...23456..14 eemore 2013-1-23 13238606 wangli_peking 2023-2-19 21:59
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