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楼主: peterlin2010

大家來貼 CPU DIE photo 吧

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 楼主| 发表于 2015-8-30 17:17:22 | 显示全部楼层
回复 30# peterlin2010

AMD new APU carrizo

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发表于 2015-9-8 17:57:17 | 显示全部楼层
好贴一定要留名!
 楼主| 发表于 2015-9-8 20:18:35 | 显示全部楼层
回复 32# joeyshen


    SPARC processor, known an M7.  This chip will have 32 S4 SPARC cores (each with up to eight dynamic threads), 64MB of L3 cache, eight DDR4 memory controllers (up to 2TB per processor and 160GBps of memory bandwidth with DDR4-2133) and eight data analytics accelerators connected over an on-chip network.

The chip is organized into eight clusters with four cores each with shared L2 cache and a partitioned 8MB of L3 cache with more than 192GBps bandwidth between a core cluster and its local L3 cache. In comparison to the M6 (a 28nm chip with 12 3.6GHz SPARC S3 cores), the M7 delivers 3-3.5 times better performance on memory bandwidth, integer throughput, OLTP, Java, ERP systems, and floating-point throughput. Stephen Phillips, Oracle's Senior Director of SPARC Architecture, said the goal was a step-function increase in performance, rather than incremental gains.The M7 can scale to 8 sockets glue-less (up to 256 cores, 2,000 threads, and 16TB of memory), and with an ASIC switch to manage traffic between them in an SMP configuration, up to 32 processors, so you could end up with a system with 1,024 cores, 8,192 threads, and up to 64TB of memory. Pretty impressive. Oracle said it offers 3 to 3.5 times better performance on a variety of tests, compared with last year's SPARC M6. The company said this will be optimized for Oracle's own software stack, manufactured on a 20nm process, and available in systems sometime next yea

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发表于 2015-11-5 12:55:59 | 显示全部楼层
谢谢分享
 楼主| 发表于 2015-11-7 07:31:50 | 显示全部楼层
回复 34# tlhuang168


    core M Broadwell

intel-core-m-broadwell-y-die-diagram-map.jpg
发表于 2015-12-29 18:06:47 | 显示全部楼层
回复 35# peterlin2010


    ding

samsung bio  processor ??

art_1418751542.jpg
发表于 2016-1-7 01:00:59 | 显示全部楼层
VERY GOOD
 楼主| 发表于 2016-1-7 21:14:52 | 显示全部楼层
回复 37# xlteam2

MIPS CPU

R4000


MIPS_R4000_die.JPG

r5000
220px-NEC_VR5000_die.JPG
 楼主| 发表于 2016-2-2 20:10:58 | 显示全部楼层
回复 10# colindeng

Intel describes 80-core Teraflop chip
    Stay tuned for more from the 2007 International Solid State Circuits Conference.

80 CPU 都 x86 cpu core ?

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 楼主| 发表于 2016-10-22 09:21:40 | 显示全部楼层
本帖最后由 peterlin2010 于 2016-10-22 09:29 编辑

回复 10# colindeng


    apple a10 cpu die

287d272846b8723.png_600x600.png

apple iphone 7 cpu

e92af0d0daf5bc880fd3d0f92178c557.jpg

A10 Fusion芯片.jpg
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