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If you have any interest in the position, please send your bilingual resume as
attachments to marvell.recruit@gmail.com Subject of your email should be “Your Name_University_Applied Position Title”
Job Title: Physical Design Engineer
Department: COT PD
Location: Shanghai/Chengdu
Requirements:
-BS/MS in EE/CS required.
-Three or more years of hands-on experience in IC physical design, verification and tapeouts.
-Proven track records of working independently on place-and-route project running and DRC/LVS/ERC/Antenna debugging skills
-Experience with Magma or Synopsys place-and-route tool set and physical design project implementation.
-Knowledge of Mentor's Calibre or Synopsys' Hercules runsets or ruledecks creation and debugging.
-Good programming skill. Capable of writing Tcl or Perl.
-Familiar with synthesis, static timing analysis.
-In-depth understanding of fabrication processing steps used in major fabrication industries.
-Self-motivated team worker, good verbal and written communication skills in English.
-Technical and team leadership proffered. Previous management experience highly desired.
-Experience with synthesis, DFT, and verification is preferred.
Description:
-IC implementation from netlist to gdsii, with floorplanning, place and route, timing closure, and physical verification.
-Crosstalk analysis, power analysis, and static timing analysis.
-Write scripts in Tcl to improve productivity.
-As a key member of central physical design team, your will play a important role in assisting multiple Marvell design groups in physical design, verification (DRC/LVS/ERC/Antenna) and tapeout.
-You will have the opportunity to help develop next generation physical implementation flow for
cutting-edge technology. |
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