招聘模拟版图工程师

FIC · 发表于 2016-9-21 16:49:28

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本帖最后由 FIC 于 2016-9-22 10:20 编辑

We are Shanghai Formula Microelectronics Co.,Ltd, which is a young startup company founded by a core team from Silicon Valley. The company focus on analog and mixed signal IC developments. We are now looking for experienced and talented analog layout engineer to join us!

Senior/Staff Layout Engineer
薪酬待遇：
15000-25000RMB/月， 14薪+股权激励，五险一金，弹性工作。
工作地点：
上海张江

职位要求：
1. 微电子相关专业毕业，学历本科以上。 5年以上 Mixed Signal/Analog custom layout经验。
2. 具有高速模拟版图经验，高速ADC、Serdes、PLL等。具有65nm以下深亚微米工艺版图经验。
3. 熟悉Unix环境，精通Cadence设计环境和流程，熟悉Virtuoso XL和Calibre DRC/LVS/PEX。
4. 具有较强的团队合作和抗压能力，工作积极主动，善于沟通和交流。具有良好的英文书面和口头表达能力。
5. 有写SKILL/Shell script能力者优先。

Qualifications：
1. Bachelor degree in Electrical related field. At least 5 years mixed-signal/Analog full-custom layout experience.
2. Experiences in high speed layout, like high speed ADC, Serdes, PLL, etc. Experience in advanced semiconductor technology process.
3. Familiar with Unix/Linux OS, deep experience with layout in Cadence design enviroment. Familiar with Virtuoso XL and Calibre verification tools. (DRC, LVS, PEX, etc.)
4. Good team player, self-motivated, and good at communication. Good English skill.
5. Ability in SKILL/Shell programming will be preferred.

If you are interested in the position, please send your Chinese and English resume to hr@formula-ic.com.

Thanks for your interest, we are looking forward to hearing from you!