可以教我如何寫pwm程式的testbench 嗎

wulove1029

可以教我如何寫pwm程式的 testbench 嗎
我想練習這程式 可是卻不知道怎麼驗證

module pwm(clk,write_date,cs,write_n,addr,clr_n,read_date,pwn_out);
  input clk;
  input [31:0]write_date;
  input cs;
  input write_n;
  input addr;
  input clr_n;
  output [31:0]read_date;
  output pwn_out;

  reg [31:0]period;
  reg [31:0]pulse_width;
  reg [31:0]counter;
  reg off;
  reg [31:0]read_date;
  wire period_en,pulse_width_en;

  always@(posedge clk or negedge clr_n)
  begin
    if(clr_n == 0)
      begin
        period <= 32'h00000000;
        pulse_width <= 32'h00000000;
      end
    else
      begin
        if(period_en)
          period <= write_date[31:0];
        else
          period = period;
         
        if(pulse_width_en)
          pulse_width <= write_date[31:0];
        else
          pulse_width = pulse_width;
      end
  end

  always@(addr or period or pulse_width)
  begin
    if(addr == 0)
      read_date = period;
    else
      read_date = pulse_width;
  end

  always@(posedge clk or negedge clr_n)
  begin
    if(clr_n == 0)
      counter <= 0;
    else if(counter >= period - 1)
      counter <= 0;
    else
      counter <= counter + 1;
  end

  always@(posedge clk or negedge clr_n)
  begin
    if(clr_n == 0)
      off <= 0;
    else if(counter >= pulse_width)
      off <= 1;
    else if(counter == 0)
      off <= off;
  end
  
  assign period_en = cs & !write_n & !addr;
  assign pulse_width_en = cs & !write_n & !addr;
  assign pwm_out = !off;
endmodule

buley

是脉宽调制吧，应该不难，你变换输入，然后看输出就好了呀。

wulove1029

謝謝 我會試試看