CDL to Schematic in CADENCE with ports mismatched!!!

xsjyahoo

CDL follows as:
.subckt INVX21 CO SO A
M0 SO A VDD VDD P l=0.18u w=1.14u
M1 SO A VSS VSS N l=0.18u w=0.48u
M2 CO SO VDD VDD P l=0.18u w=1.14u
M3 CO SO VSS VSS N l=0.18u w=0.48u
.ends INVX21



when imported into Cadence, the output port SO is converted to input port as shown below:




any help is best regarded!

idbi

.subckt INVX21 CO SO A
M0 SO A VDD VDD P l=0.18u w=1.14u
M1 SO A VSS VSS N l=0.18u w=0.48u
M2 CO SO VDD VDD P l=0.18u w=1.14u
M3 CO SO VSS VSS N l=0.18u w=0.48u
.ends INVX21


你的netlist有错误，不是一个简单inv，同时还实现一个buf功能。
对工具而言出现匹配错误。
你应该把cdl里面的info 也加上去。

joarcxopner

哈哈，期待高手哦。

wagewage2

CDL 中没有方向定义，这要看工具如何推断的，如果认为跟GATE相连的就是input, 那就 。。。

xsjyahoo

* $ID: ****
*.SCALE meter
.GLOBAL GND VSS VDD

.subckt ADDFHX1 CO S A B CI
M0 net105 net123 net132 VDD P l=0.18u w=0.72u
M1 net105 net117 net130 VDD P l=0.18u w=0.72u
M2 net111 net123 net130 VDD P l=0.18u w=0.72u
M3 net111 net117 net124 VDD P l=0.18u w=0.72u
M4 net117 net132 net136 VDD P l=0.18u w=1.14u
M5 net117 B net138 VDD P l=0.18u w=1.14u
M6 net123 net132 net138 VDD P l=0.18u w=1.14u
M7 net123 B net136 VDD P l=0.18u w=1.14u
M8 net105 net117 net132 VSS N l=0.18u w=0.48u
M9 net105 net123 net130 VSS N l=0.18u w=0.48u
M10 net111 net117 net130 VSS N l=0.18u w=0.48u
M11 net111 net123 net124 VSS N l=0.18u w=0.48u
M12 net117 B net136 VSS N l=0.18u w=0.76u
M13 net117 net132 net138 VSS N l=0.18u w=0.76u
M14 net123 B net138 VSS N l=0.18u w=0.76u
M15 net123 net132 net136 VSS N l=0.18u w=0.76u
M16 net124 net130 VSS VSS N l=0.18u w=0.48u
M17 VDD net130 net124 VDD P l=0.18u w=0.72u
M18 CO net105 VSS VSS N l=0.18u w=0.6u
M19 VDD net105 CO VDD P l=0.18u w=0.9u
M20 S net111 VSS VSS N l=0.18u w=0.6u
M21 VDD net111 S VDD P l=0.18u w=0.9u
M22 net130 CI VSS VSS N l=0.18u w=0.66u
M23 VDD CI net130 VDD P l=0.18u w=1u
M24 net132 B VSS VSS N l=0.18u w=1.08u
M25 VDD B net132 VDD P l=0.18u w=1.62u
M26 net134 A VSS VSS N l=0.18u w=0.3u
M27 VDD A net134 VDD P l=0.18u w=0.46u
M28 net136 net134 VSS VSS N l=0.18u w=0.76u
M29 VDD net134 net136 VDD P l=0.18u w=1.14u
M30 net138 A VSS VSS N l=0.18u w=0.76u
M31 VDD A net138 VDD P l=0.18u w=1.14u
.ends ADDFHX1

It appears the same problem as the simplified cdl file. More over, the netlist imported in cadence as schematic file can not analyzed by spectre, following as:

Notice: during circuit read in:
Subcircuit  INVX1 is empty.

ksg12

add .pininfo ....

hanxiong99

请问下楼主，CDL IN的时候报以下错误是怎么回事呢？
failed to find the terminal D in the master cell of instance M_u2-M_u1. provide the correct master cell
网表如下：
.subckt AN2D0 A1 A2 Z
M_u3-M_u2 Z net6 VSS VSS n w=0.43u l=0.13u
M_u2-M_u4 X_u2-net6 VSS VSS n w=0.43u l=0.13u
M_u2-M_u3  net6 VSS VSS n w=0.43u l=0.13u
M_u3-M_u3 Z net6 VSS VSS n w=0.635u l=0.13u
M_u2-M_u2  net6 VSS VSS n w=0.635u l=0.13u
M_u2-M_u1  net6 VSS VSS n w=0.635u l=0.13u
.ends

axlrose2138

问的不清楚，没看明白杀意思？