|
|
|
马上注册，结交更多好友，享用更多功能，让你轻松玩转社区。
您需要 登录 才可以下载或查看，没有账号？注册
x
Hajimiri學生Buckwalter
現任UCSD教職 (http://circuit.ucsd.edu/~buckwalter/)
Abstract
The past decade has witnessed a drastic change in the design of high-speed serial links.
While Silicon fabrication technology has produced smaller, faster transistors, transmission
line interconnects between chips and through backplanes have not substantially improved
and have a practical bandwidth of around 3GHz. As serial link speeds increase, new
techniques must be introduced to overcome the bandwidth limitation and maintain digital
signal integrity. This thesis studies timing issues pertaining to bandwidth-limited
interconnects. Jitter is defined as the timing uncertainty at a threshold used to detect the
digital signal. Reliable digital communication requires minimizing jitter.
The analysis and modeling presented here focuses on two types of deterministic jitter.
First, dispersion of the digital signal in a bandwidth-limited channel creates
data-dependent jitter. Our analysis links data sequences to unique timing deviations
through the channel response and is shown for general linear time-invariant systems. A
Markov model is constructed to study the impact of jitter on the operation of the serial link
and provide insight in circuit performance. Second, an analysis of bounded-uncorrected
jitter resulting from crosstalk induced in parallel serial links is presented.
Timing equalization is introduced to improve the signal integrity of high-speed links.
The analysis of deterministic jitter leads to novel techniques for compensating the timing
ambiguity in the received data. Data-dependent jitter equalization is discussed at both the
receiver, where it complements the operation of clock and data recovery circuits, and as a
phase pre-emphasis technique. Crosstalk-induced, bounded-uncorrected jitter can also be
compensated. By detecting electromagnetic modes between neighboring serial links, a
transmitter or receiver anticipates the timing deviation that has occurred along the
transmission line.
Finally, we discuss a new circuit technique for submillimeter integrated circuits.
Demands of wireless communication and the high speed of Silicon Germanium transistors
provide opportunities for unique radio architectures for submillimeter integrated circuits.
Scalable, fully-integrated phased arrays control a radiated beam pattern electronically
through tiling multiple chips. Coupled-oscillator arrays are used for the first time to
subharmonically injection-lock across a chip or between multiple chips to provide phase
coherence across an array.
(2006.01)[Buckwalter]Deterministic Jitter in Broadband Communication.part1.rar
(4.29 MB, 下载次数: 92 )
(2006.01)[Buckwalter]Deterministic Jitter in Broadband Communication.part2.rar
(3.05 MB, 下载次数: 96 )
|
|
/2 
eetop公众号
创芯大讲堂
创芯人才网
发表于 2010-12-26 11:46:35
