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lijun4959

I am now study Verilog DHL , could someone give some advice?

deleter

1. understanding what does 'HDL' stand for.In essence，‘HDL' is quite  different from programming language(ex: C) which is executed by CPU.'HDL' is just a hardware description language , netlist of a schematic.
2. you may follow "http://www.asic-world.com/verilog/veritut.html".
3.practice hardly.

pkf690801

感谢分享！~~~

lennon789

受教了