IEEE Standard Verilog Hardware Description Language

wadezhu

This introduction is not part of IEEE Std 1364-2001, IEEE Standard Verilog®Hardware Description Language.


The VerilogHardware Description Language (Verilog HDL) became an IEEE standard  in 1995 as IEEE
Std 1364-1995. It was designed  to be simple,  intuitive, and effective at multiple  levels of abstraction  in a
standard textual format for a variety of design tools, including verification simulation, timing analysis, test
analysis, and synthesis. It is because of these rich features that Verilog has been accepted to be the language
of choice by an overwhelming number of IC designers.

diploma

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Hellen.Gong

thanks a lot.

andyd

　Verilog HDL基本的一定要看的
还在学习中
感谢分享

risccpu

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risccpu

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hollywould

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chiu123

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爷是聪聪

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