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Towards generic charge-pump phase-locked loop, jitter estimation techniques

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发表于 2008-10-17 20:47:11 | 显示全部楼层 |阅读模式

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This paper focuses on specific aspects of a new framework includingtechniques and methodologies that can detect significant block levelerrors that lead to spectral degradation. The final crux of the work isto focus towards measurement techniques that can be mapped directly tospectral degradation, and thus prove unambiguously that the CP-PLLsystem is ‘right by design’ and free from errors without resorting todifficult direct measurements. This
paper provides an overview of typical non-idealities and the associatedeffects on spectral degradation and also provides explanations ofsuitable detection methods. It is expected that with ever increasingsystem frequencies, thorough analysis of the relationship between
system non-idealities and jitter/phase noise may be the only optionavailable for rapid production testing of fully embedded CP-PLLs.

Towards generic charge-pump phase-locked loop, jitter estimation techniques.pdf

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发表于 2008-10-21 00:59:22 | 显示全部楼层
good good
发表于 2009-2-7 22:54:07 | 显示全部楼层

kanxiaha

看下哈!
发表于 2009-2-8 00:28:21 | 显示全部楼层
好东西 
发表于 2009-3-1 14:31:32 | 显示全部楼层
Thanks for sharing!!!
发表于 2009-3-3 14:55:15 | 显示全部楼层
what is this???
发表于 2009-4-6 16:08:49 | 显示全部楼层
好像很不错的说
发表于 2009-4-6 16:22:03 | 显示全部楼层
thanks good book
发表于 2009-4-6 16:33:37 | 显示全部楼层
发表于 2010-5-20 23:46:21 | 显示全部楼层
Design of High-performance CMOS Charge pumps in Phase-locked loops
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