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This paper focuses on specific aspects of a new framework includingtechniques and methodologies that can detect significant block levelerrors that lead to spectral degradation. The final crux of the work isto focus towards measurement techniques that can be mapped directly tospectral degradation, and thus prove unambiguously that the CP-PLLsystem is ‘right by design’ and free from errors without resorting todifficult direct measurements. This
paper provides an overview of typical non-idealities and the associatedeffects on spectral degradation and also provides explanations ofsuitable detection methods. It is expected that with ever increasingsystem frequencies, thorough analysis of the relationship between
system non-idealities and jitter/phase noise may be the only optionavailable for rapid production testing of fully embedded CP-PLLs. |
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