CMOS Power Amplifier with ESD Protection (Ker)

semico_ljj

CMOS Power Amplifier with ESD Protection Design
Merged in Matching Network


Yu-Da Shiu1, Bo-Shih Huang1, and Ming-Dou Ker2

1SoC Technology Center, Industrial Technology Research Institute, Hsinchu, Taiwan.
2Nanoelectronics and Gigascale Systems Laboratory, Institute of Electronics, National Chiao-Tung University, Hsinchu, Taiwan.
Email: {ydshiu, [email=huangboshi}@itri.org.tw]huangboshi}@itri.org.tw[/email] and mdker@ieee.org

Abstract

A power amplifier (PA) with combination of ESD
protection circuit and matching network into single block was
proposed and implemented in a 0.18-μm CMOS process. By
comprising ESD protection function into the matching network,
this design omits individual I/O ESD clamps to alleviate
loading that degrades RF performances. According to the
experimental results, the ESD protection circuit with LC
configuration contributes a 3.0-kV human body model (HBM)
ESD robustness without significant degradation on RF
performances of the PA for 2.4-GHz RF applications.

kaosk

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yangq716

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jeffej

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花海

多谢分享

smrecnik

thanks for sharing

cdting

非常感謝~~~~

david.yih

good!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!

tracyslnn236

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markhorrow

非常感谢提供！