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本帖最后由 waynesuvol 于 2011-7-19 10:33 编辑
Hi everyone!
Sorry that I can not type Chinese right now......
I am now trying to simulate the transient behavior of a conventional analog integrator in Pspice.
The circuit is simple, capacitor in the negative feedback loop around the ideal opamp. I attach the screenshot of the schematic.
I use a DC source as the input of the integrator. I just want to see the output of the opamp integrating with the constant.
BUT, the simulation result is very disappointing. The output of the opamp is clipped at the negative power supply. But what we expect is a ramp.
Is this result caused by the algorithm used by Pspice? There shouldn't be anything wrong with the circuit because it is too simple. I think it must have something to do with the method that pspice uses to solve the circuit.
The DC operating point simulation showed that, the voltage of inverting input terminal is not near ground. It is equal to the input voltage......too bad....
This should be something related to how Pspice extracts the matrix of the circuit, I think. But I really do not know why...
Please help!!! Thanks a lot!! |
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schematic
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OP simulation
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