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[求助] Problems when simulating a simple analog integrator in Pspice

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发表于 2011-7-19 09:31:41 | 显示全部楼层 |阅读模式

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本帖最后由 waynesuvol 于 2011-7-19 10:33 编辑

Hi everyone!

Sorry that I can not type Chinese right now......

I am now trying to simulate the transient behavior of a conventional analog integrator in Pspice.
The circuit is simple, capacitor in the negative feedback loop around the ideal opamp. I attach the screenshot of the schematic.
I use a DC source as the input of the integrator. I just want to see the output of the opamp integrating with the constant.
BUT, the simulation result is very disappointing. The output of the opamp is clipped at the negative power supply. But what we expect is a ramp.
Is this result caused by the algorithm used by Pspice? There shouldn't be anything wrong with the circuit because it is too simple. I think it must have something to do with the method that pspice uses to solve the circuit.


The DC operating point simulation showed that, the voltage of inverting input terminal is not near ground. It is equal to the input voltage......too bad....
This should be something related to how Pspice extracts the matrix of the circuit, I think. But I really do not know why...


Please help!!! Thanks a lot!!

schematic

schematic

OP simulation

OP simulation
发表于 2011-7-19 09:40:56 | 显示全部楼层
你给输入一个阶跃信号吧,如果直接给DC电压,则仿真器认为C是开路的,所以就是一个反相比较器,输出时负电源应该是正常的,
 楼主| 发表于 2011-7-19 09:48:02 | 显示全部楼层
回复 2# xjqxjq28007

I have tried to use a step input, but the transient simulation was still too bad...... far from the expected one... It seems that Pspice can not extracted the circuit matrix the same way we usually use to calculate the output...
发表于 2011-7-19 09:58:57 | 显示全部楼层
回复 3# waynesuvol


    你把瞬态响应的输出截图给我看一下吧,还有你仿真的时候最好给电容并联一个大的电阻,以设置DC工作点,一般情况下积分电路要工作,运放的反相输入端虚地要满足,所以反相输入端的DC工作点也要设置在0V,你再试试看。
 楼主| 发表于 2011-7-19 10:37:58 | 显示全部楼层
回复 4# xjqxjq28007


   Hi xjqxjq28007 ! Thanks for your help.   The behavior is still far from the theoretical result...
   I have just attached a operating point simulation screenshot, where I put a big resistor in parallel with the capacitor. The problem is that the negative input terminal is not virtual ground. How could I make it around ground potential? Thanks!
发表于 2011-7-19 13:12:54 | 显示全部楼层
回复 5# waynesuvol


    你自己多调整试试吧,一般情况下做瞬态仿真的时候DC工作点稳定就可以了,不一定要准确到零,但是瞬态仿真的时候正向和反向输入端的电平关系是可以看到的,我通过分析应该可以对应起来的,另外,软件只要能跑起来就不要轻易怀疑其算法,这种基本的计算我想还是可以应付的。
发表于 2011-7-19 13:22:05 | 显示全部楼层
回复 5# waynesuvol


    你在仿真的时候记得给电容设置一个初始值,一般设置为0,我仿真的结果是当输入直流电平大于0的时候(如1V),输出时线性减小的;当输入直流电平小于0的时候(如-1V),输出时线性增加的。
 楼主| 发表于 2011-7-19 23:04:47 | 显示全部楼层
回复 7# xjqxjq28007


   Hi, 谢谢你的回答!确实,在瞬态仿真的时候,初始条件必须得小心的设置,我们需要让这个电路在瞬态仿真的时候可以顺利的启动!
给你一个链接,http://www.edaboard.com/thread219027.html

这是我在国外论坛上面发同样的问题,希望他们的解答能给你帮助!
发表于 2011-7-20 09:24:25 | 显示全部楼层
回复 8# waynesuvol


    谢谢,互相帮助,
发表于 2011-7-20 10:12:29 | 显示全部楼层
Pspice里面的理想运放是不需要直流偏置的吧,直接加小信号源就可以了。
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