Based on your case,
(1) Definetely, NO need Trimming
(2) Definetely, NO need PLL, Crystal
(3) Definetely, Impossible to meet +/-10% PVT corner using general RC ring.
here is the only solution without any external component, crystal, PLL, or any trimming:
(1) Need VBG, +/-5% (3-sigma) is never an issue, this will make V and T insensitive
(2) Design a delay Cell using R and C, in which R variation and C variation is invserly compensated. This will make P insensitive.
In summary, you can make it using above technique for +/-10% accuracy under PVT(6-sigma). And actually, this method requires a very very small overhead.
I have ever done a similar on-chip oscillator which is +/-5% under PVT. |