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論文名稱 | Overview and design of mixed-voltage I/O buffers with low-voltage thin-oxide CMOS transistors |
期刊 | Ming-Dou Ker, S.-L. Chen, and C.-S. Tsai, “Overview and design of mixed-voltage I/O buffers with low-voltage thin-oxide CMOS transistors,” IEEE Trans. on Circuits and Systems I: Regular Papers, vol. 53, no. 9, pp. 1934-1945, Sep. 2006. | 摘要 | Overview on the prior designs of the mixed-voltage I/O buffers is provided in this work. A new 2.5/5-V mixed-voltage I/O buffer realized with only thin gate-oxide devices is proposed. The new proposed mixed-voltage I/O buffer with simpler dynamic n-well bias circuit and gate-tracking circuit can prevent the undesired leakage current paths and the gate-oxide reliability problem, which occur in the conventional CMOS I/O buffer. The new mixed-voltage I/O buffer has been fabricated and verified in a 0.25- m CMOS process to serve 2.5/5-V I/O interface. Besides, another 2.5/5-V mixed-voltage I/O buffer without the subthreshold leakage problem for high-speed applications is also presented in this work. The speed, power consumption, area, and noise among these mixed-voltage I/O buffers are also compared and discussed. The new proposed mixed-voltage I/O buffers can be easily scaled toward 0.18-um (or below) CMOS processes to serve other mixed-voltage I/O interfaces, such as 1.8/3.3-V interface. | 關鍵字 | Gate-oxide reliability, gate-tracking circuit, interface, mixed-voltage I/O buffer. |
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