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【猎头职位:上海需要一位AE】联系人:Lily-Zhuang,邮箱:hr@kthr.com,微信也可查询职位啦!打开手机微信,搜号码“KTHR_COM”或查找微信公众帐号“KT人才”或扫描以上二维码即可添加,欢迎大家关注! Roles and Responsibilities: - define system partitioning of s/ccircuits and system; - define HW/SW co-partitioning; - provide technical feasibilities based onsystem simulation and/or FPGA based demonstrator; - propose new technical solutions on s/cand system level; - develop digital part of mixed signalASICs; - coach junior engineers. Qualification Requirement: - master degree in microelectronic circuitsor systems; - > 3ys experience in ASIC digitaldesign; - strong background in digital front-end:HDL coding,verification,synthesies, ATPG generation; - good understanding of ASIC mixed signalflow,top-level integration(Candence based); - experience in FPGAdevelopment,automovtive communication interface consider as a plus; - good communication skills; - foreign languages: English, German (not amust).
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