问个问题。。。Vivado2015.2版本下的模拟的时候出现的链接错误

zhumingjie159

规定只能用2015.2版本，试过其他版本但是错误类似。运行Simulation的时候（在其他机器可以很好运行的工程），总是提示如下信息：

launch_simulation
INFO: [USF-XSim-27] Simulation object is 'sim_1'
INFO: [USF-XSim-37] Inspecting design source files for 'ALU32_sim' in fileset 'sim_1'...
INFO: [USF-XSim-97] Finding global include files...
INFO: [USF-XSim-98] Fetching design files from 'sim_1'...
INFO: [USF-XSim-2] XSim::Compile design
INFO: [USF-XSim-61] Executing 'COMPILE' step in 'D:/ALU32/ALU32.sim/sim_1/behav'
"xvlog -m64 --relax -prj ALU32_sim_vlog.prj"
INFO: [VRFC 10-2263] Analyzing verilog file "D:/ALU32/ALU32.srcs/sources_1/new/ALU32.v" into library xil_defaultlib
INFO: [VRFC 10-311] analyzing module ALU32
INFO: [VRFC 10-2263] Analyzing Verilog file "D:/ALU32/ALU32.srcs/sim_1/new/ALU32_sim.v" into library xil_defaultlib
INFO: [VRFC 10-311] analyzing module ALU32_sim
INFO: [VRFC 10-2263] Analyzing Verilog file "D:/ALU32/ALU32.sim/sim_1/behav/glbl.v" into library xil_defaultlib
INFO: [VRFC 10-311] analyzing module glbl
INFO: [USF-XSim-3] XSim::Elaborate design
INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'D:/ALU32/ALU32.sim/sim_1/behav'
Vivado Simulator 2015.2
Copyright 1986-1999, 2001-2015 Xilinx, Inc. All Rights Reserved.
Running: D:/xilinx/Vivado/2015.2/bin/unwrapped/win64.o/xelab.exe -wto b54283ba934a405691256c54c943178b --debug typical --relax --mt 2 -L xil_defaultlib -L unisims_ver -L unimacro_ver -L secureip --snapshot ALU32_sim_behav xil_defaultlib.ALU32_sim xil_defaultlib.glbl -log elaborate.log
Using 2 slave threads.
WARNING: [XSIM 43-3431] One or more environment variables have been detected which affect the operation of the C compiler. These are typically not set in standard installations and are not tested by Xilinx, however they may be appropriate for your system, so the flow will attempt to continue.  If errors occur, try running fuse with the "-mt off -v 1" switches to see more information from the C compiler. The following environment variables have been detected:
    C_INCLUDE_PATH
    LIBRARY_PATH
Starting static elaboration
Completed static elaboration
Starting simulation data flow analysis
Completed simulation data flow analysis
Time Resolution for simulation is 1ps
Compiling module xil_defaultlib.ALU32
Compiling module xil_defaultlib.ALU32_sim
Compiling module xil_defaultlib.glbl
Waiting for 2 sub-compilation(s) to finish...
D:/Dev-Cpp/MinGW32/lib/crt2.o: file not recognized: File format not recognized
collect2: ld returned 1 exit status
ERROR: [XSIM 43-3238] Failed to link the design.
INFO: [USF-XSim-99] Step results log file:'D:/ALU32/ALU32.sim/sim_1/behav/elaborate.log'
ERROR: [USF-XSim-62] 'elaborate' step failed with error(s). Please check the Tcl console output or 'D:/ALU32/ALU32.sim/sim_1/behav/elaborate.log' file for more information.


本人机器Win10 64bit系统 环境变量中PATH加入了MinGW32(GCC版本为4.8.1)
求教是哪里的问题。。

zhumingjie159

顶顶……

gaolou1991

顶起来。虽然我不知道是啥情况

failedtolink

似乎是同学...我也遇到了差不多的问题。。