您請研讀附件,
(1) Split Capacitor DAC Mismatch Calibration in Successive Approximation ADC
(2) A 2 7mW 1MSps 10b analog-to-digital converter with built-in reference buffer and 1LSB accuracy programmable input ranges
(3) 10-b 50-MSs 820-uW SAR ADC with on-chip Digital Calibration
(4) A Study on Energty-and-Area-Efficient Charge Redistribution Successive Approximation Aaalog-to-Digital COnverters Page38
您就會到bridge Structure SAR ADC 架構need Cc and Cb Capacitor.
您需要study以下的論文
(1)Split Capacitor DAC Mismatch Calibration in Successive Approximation ADC
(2)A 10-b 50-MSs 820-uW SAR ADC with on-chip Digital Calibration
(3) A 2 7mW 1MSps 10b analog-to-digital converter with built-in reference buffer and 1LSB accuracy programmable input ranges
(4) A Study on Energy-and-Area-Efficient Charge Redistribution Successive Approximation Analog-to-Ditital Converters Author: Chen,Yanfei Page38
看完您就知道如何設計 Cc and Cb的電容值了