DDR3 Read Leveling

chb734812620 · 发表于 2018-7-27 15:59:00

学习了

huminsky · 发表于 2018-8-6 18:24:12

DDR3 ????

whosi1986 · 发表于 2019-1-23 10:26:06

回复 1# linghuqiubai

两种做法，应该都可以做到。就看芯片内部怎么实现的吧？

另外，为什么是调整DQS，而不是调整DQ group或者单个dq一次调呢？

花涛 · 发表于 2019-1-23 23:20:59

“Read training” collectively refers to gate training and read data eye training.
The goal of gate training is to locate the setting at which the initial read DQS rising edge aligns with the rising edge of the
read DQS gate.

珊瑚ang · 发表于 2021-9-8 11:57:02

学习了

hello_kitty234 · 发表于 2024-8-2 00:24:22

都是大神，学习了

[求助] DDR3 Read Leveling

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