module tt_t;
reg [31:0] data_mem[0:393215];
reg clk;
reg rst;
reg [31:0]data_in;
reg [16:0]i;
initial
begin
clk=0;
forever #50 clk=~clk;
end
initial
begin
rst=1;
#100 rst=0;
end
initial
begin
$readmemh("intensity.txt",data_mem); //
end
always @(posedge clk)
begin
if(~rst)
begin
data_in <= 8'd0;
i <= 8'd0;
end
else
begin
data_in <= data_mem[i]; //??????????
i <= i + 8'd1;
end
end
endmodule