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发表于 2013-3-2 13:49:06
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显示全部楼层
根据你的描述我做了一下,供你参考:
每个条件只要赋值你想显示数据给对应的hex就行了;
module (
display_sel,
hex1_out,
hex2_out,
hex3_out,
hex4_out,
hex5_out,
hex6_out,
hex7_out,
hex8_out
);
input[7:0] display_sel; 片选信号输入
output hex1_out;//用于驱动数码管led;
output hex2_out;
output hex3_out;
output hex4_out;
output hex5_out;
output hex6_out;
output hex7_out;
output hex8_out;
reg[3:0] di_hex1;
reg[3:0] di_hex2;
reg[3:0] di_hex3;
reg[3:0] di_hex4;
reg[3:0] di_hex5;
reg[3:0] di_hex6;
reg[3:0] di_hex7;
reg[3:0] di_hex8;
alway@*
begin
case(display_sel)//你可以用状态机来实现
条件1: ;
条件2: ;
条件3: ;
.
.
.
条件(7、8、1、2亮)1100_0011:
begin
di_hex1=4'd0;
di_hex2=4'd3;
di_hex7=4'd0;
di_hex8=4'd5;
end
.
.
条件n: ;
default: 语句:
endcase
end
hex hex1(
.data_in(di_hex1),
.seg_7(hex1_out)
);
hex hex2(
.data_in(di_hex2),
.seg_7(hex2_out)
);
hex hex7(
.data_in(di_hex7),
.seg_7(hex7_out)
);
hex hex8(
.data_in(di_hex8),
.seg_7(hex8_out)
);
module hex(
data_in,
seg_7
);
input[3:0]data_in;
output [6:0]seg_7;
reg[6:0] seg_7;
always@(data_in)
case(data_in)
4'd0 : seg_7=7'b1000000;//具体值看你的数码管电路
4'd1 : seg_7=7'b1111001;
4'd2 : seg_7=7'b0100100;
4'd3 : seg_7=7'b0110000;
4'd4 : seg_7=7'b0011001;
4'd5 : seg_7=7'b0010010;
4'd6 : seg_7=7'b0000010;
4'd7 : seg_7=7'b1111000;
4'd8 : seg_7=7'b0000000;
4'd9 : seg_7=7'b0011000;
default: seg_7=7'b0000000;
endcase
endmodule
endmodule |
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