对任何reg赋值用非阻塞赋值代替阻塞赋值 reg 的非阻塞赋值要加单位延迟但异
步复位可加可不加=与=的区别
Always @(posedge Clk or negedge Rst_)
Begin
If (!Rst_) // prioritize the “if conditions” in if statement
Begin
Rega <= 0; //non_blocking assignment
Regb <= 0;
End
Else if (Soft_rst_all)
Begin
Rega <= #u_dly 0; //add unit delay
Regb <= #u_dly 0;
End
Else if (Load_init)
Begin
Rega <= #u_dly init_rega;
Regb <= #u_dly init_regb;
End
Else
Begin
Rega <= #u_dly Rega << 1;
Regb <= #u_dly St_1;
End
End // end Rega, Regb assignment.