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Short Course on Phase-Locked Loops and their Applications :2008
by Michael H. Perrott
Integer-N Frequency Synthesizers PDF
- Overview
- System level modeling
- Closed loop behavior
- Noise analysis
Advanced Analog Synthesizers, Clock and Data Recovery PDF
- Dual-loop synthesizers
- Direct digital synthesizers
- Fractional-N synthesizers
- Clock and data recovery (CDR)
- Delay-locked loops (DLL)
Basic Building Blocks (Part I) PDF
- Background (noise figure, matching networks)
- Voltage-controlled oscillators (VCO)
- Noise in LC Voltage-controlled oscillators
Basic Building Blocks (Part II), PLL Design PDF
- High speed frequency dividers
- Phase detectors and charge pumps
- Loop filter structures
- Classical open loop PLL design
- Closed loop CAD-based PLL design
Advanced Analog Synthesizer Techniques PDF
- Modulation
- Bandwidth compensation
- Quantization noise cancellation
- Behavioral simulation techniques
Behavioral Simulation Exercises PDF
- Introduction to CppSim
- Fractional-N synthesizer simulation example
- Advanced example (selection by attendee)
Digital Frequency Synthesizers PDF
- Advantages and challenges
- Time-to-digital conversion
- Digitally-controlled oscillators
- System level modeling
Examples of Leveraging Digital Techniques in PLLs PDF
- High performance digital fractional-N synthesizer example
- Mixed-Signal CDR example
- Digital frequency acquisition example
Advanced PLL Examples (Part I) PDF
- Fast offset compensation for CDR limit amps
- Fractional-N based DLL
- Low-jitter multiplying DLL
- Sub-harmonic injection-locked oscillator
Advanced PLL Examples (Part II) PDF
- Optical/electrical phase-locked loop
- High speed clock-and-data recovery
- VCO-based analog-to-digital conversion
- MEMs-based clocking |
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