Networks-on-chip and Networks-in-Package for High-Performance SoC Platforms

drjiachen

Abstract- A structured packet-switched Networks-on-Chip
(NoC) is designed and implemented for high-performance
heterogeneous SoC design platform. The chip integrates
multiprocessors, multiple memories, and other heterogeneous
Intellectual Properties and interconnection with 51mW and
1.6GHz on-chip networks. The NoC adopts a partial activated
crossbar, low-energy coding, and low-swing signaling for the
power consumption optimization. A Network-in-Package
integrating four NoCs is fabricated in a 676-BGA-type package
for larger and scalable systems and demonstrates 2D-imageprocessing
and 3D-graphics applications.

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sanyuan0902

多谢多谢了

lujunfeng111

不错的资料，多谢楼主。

chlliu

谢谢共享。

fixit

thanks

idoiwant

thansk very much!!!!!

hugodarwin

This paper appears in: Asian Solid-State Circuits Conference, 2005

nico0811

GOOD.3X

fixit

thanks

pop326

感謝分享~正學習需要,謝謝!!