在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
查看: 2609|回复: 1

Analog IC Designer for Hard Disk Drive Read Channel --Shanghai

[复制链接]
发表于 2006-10-18 17:47:30 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x
About our client:

Our client  is a global leader in semiconductors for storage, wireless data, and public and enterprise networks. The company's chips and software power a broad range of computing and communications applications, from cell phones, PCs, PDAs, hard disk drives and gaming devices to the world's most sophisticated wireless and wireline networks. Its customers include top manufacturers of consumer electronics, communications and computing equipment. Its products connect people to information and entertainment at home, at work and on the road -- enabling the connected lifestyle. Its Storage Division is the world leader in preamplifier and read channel integrated circuits. We have been a valued provider of electronics solutions to hard disk drive OEMs for over 10 years. From PRML read channels and controller ASICs to Preamplifiers and Motor Controllers, we deliver advanced, high performance HDD electronics.


Position Description:

A read channel analog IC design engineer’s duties include working within a highly motivated product development team to create and modify high speed mixed signal integrated circuits. You will support the cross functional team in taking our concepts thru to high volume production and assist us in becoming the market leaders in this Mass Storage (hard disk drive) industry.


Job Responsibilities:

1.Design the next generation Analog circuits for the Read Channel macro.
2.Work with Architecture and Digital Development Teams to achieve optimal implementation.
3.Verify and validate the functionality of the analog circuits.

Job Qualifications:

1.Communicate effectively within a global business environment (must be proficient in both spoken and written English)
2.3+ years experience in chip level CMOS analog design
3.Experience with high speed opamps, continuous time filters, wide band A/D & D/A converters, and PLLs preferred
4.Must have experience with Cadence tools.
5.Experience in developing simulation and verification test benches
6.Excellent technical troubleshooting and demonstrated problem solving skills
7.Must be willing to follow a structured design approach including design for reuse and provide thorough design documentation
l       

Education/Certifications:
Required Degree: BS
Preferred Degree: MS or PhD
Preferred Major: Microelectronics, Electrical Engineering or related discipline

E-mail:shzhang2006@yahoo.com.cn
MSN:shzhang2006@yahoo.com.cn
 楼主| 发表于 2006-11-7 12:25:12 | 显示全部楼层

该职位仍然有效

该职位继续招聘中,只要英文好,资历浅一点没有关系
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /1 下一条

小黑屋| 手机版| 关于我们| 联系我们| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2025-1-31 06:28 , Processed in 0.030073 second(s), 8 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表