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hi,thanks for you attention!
I use ELC in my work ,when i type the "db_prepare -force" there goes the warning:
elc> db_prepare -force
==== Simplify Mode ====
MODEL FILE: amic5n.scs ( #size = 4486 )
Reading MODEL: AMI06N
Reading MODEL: AMI06P
SUBCKT FILE: amic5n.scs ( #size = 4486 )
SUBCKT FILE: dut_sub.scs ( #size = 287 )
Reading SUBCKT:INV
Expanding SUBCKT:INV
Writing : foo.ipdb/INV.design
Writing : foo.ipdb/INV.design/body/path
Writing : foo.ipdb/INV.design/body/instance
Writing : foo.ipdb/INV.design/body/net
Writing : foo.ipdb/INV.design/boundary/port
Reading : foo.ipdb/INV.design
==============================
DESIGN : INV
==============================
--------------------
--------------------
D0000: : POWER
--------------------
=> 1 vectors generated
Writing : foo.ipdb/INV.design/simulate/spec
Writing : foo.ipdb/INV.design/simulate/subckt
[WARNING(db_prepare)]alone net : A is found. => [reset to ground]
[WARNING(db_prepare)]Please check whether supply nodes are marked global in the netlist, if not specify them with .global statements
[WARNING(db_prepare)]alone net : Y is found. => [reset to ground]
[WARNING(db_prepare)]Please check whether supply nodes are marked global in the netlist, if not specify them with .global statements
[WARNING(db_prepare)]alone net : VDD is found. => [reset to ground]
[WARNING(db_prepare)]Please check whether supply nodes are marked global in the netlist, if not specify them with .global statements
[WARNING(db_prepare)]alone net : GND is found. => [reset to ground]
[WARNING(db_prepare)]Please check whether supply nodes are marked global in the netlist, if not specify them with .global statements
Writing : foo.ipdb/INV.design/boundary/port
Writing : foo.ipdb/INV.design/body/type
================================
stimulus generation summary
================================
Name #MOS #DVEC #RVEC
----------------------------------------
INV 0 1 0
----------------------------------------
1 0
Reading setup file : setup.ss
- INV (CELL) - typical - 2011-02-25 15:11:06 (2011-02-25 07:11:06 GMT)
then i type "db_date" ,it can not recognize the NOT gate
elc> db_gate
==============================
DESIGN : INV
==============================
DESIGN ( INV );
// =================
// PORT DEFINITION
// =================
SUPPLY0 GND ( GND );
SUPPLY1 VDD ( VDD );
FEEDTHRU A ( A );
FEEDTHRU Y ( Y );
// ===========
// INSTANCES
// ===========
END_OF_DESIGN;
- feed-through ( A ) is found
- feed-through ( Y ) is found
can you help me to deal with it ?thanks very much
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eetop公众号
创芯大讲堂
创芯人才网
发表于 2011-2-26 13:31:53
楼主