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Abstract—The Chien search process is the most complex block
in the decoding of Bose–Chaudhuri–Hochquenghem (BCH) codes.
Since the BCH codes conduct the bit-by-bit error correction, they
often need a parallel implementation for high throughput applications.
The parallel implementation obviously needs much increased
hardware. In this paper, we propose a strength reduced architecture
for the parallel Chien search process. The proposed method
transforms the expensive modulo- 􀀀 multiplications into shift
operations, by which not only the hardware for multiplications but
also that for additions are much reduced. One example shows that
the hardware complexity is reduced by 90% in the implementation
of binary BCH (8191, 7684, 39) code with the parallel factor of 64.
Consequently, it is possible to achieve a speedup of 64 with only 13
times of the hardware complexity when compared with the serial
processing.
Strength-Reduced Parallel Chien Search.pdf
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