IC数字前端设计经典书

fancyher · 发表于 2006-8-7 20:59:55

A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog

fancyher · 发表于 2006-8-7 21:01:27

A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog

fancyher · 发表于 2006-8-7 21:04:06

A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog

fancyher · 发表于 2006-8-7 21:08:18

A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog

fancyher · 发表于 2006-8-7 21:12:23

A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog

fancyher · 发表于 2006-8-7 21:14:58

A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.part

fancyher · 发表于 2006-8-7 21:20:16

A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog.part

fancyher · 发表于 2006-8-7 21:25:05

A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog

fancyher · 发表于 2006-8-7 21:34:13

A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog

fancyher · 发表于 2006-8-7 21:41:39

A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog

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