leon2 资料

baizhuxi

The LEON VHDL model implements a 32-bit processor conforming to the SPARC V8
architecture. It is designed for embedded applications with the following features on-chip:
separate instruction and data caches, hardware multiplier and divider, interrupt controller,
debug support unit with trace buffer, two 24-bit timers, two UARTs, power-down function,
watchdog, 16-bit I/O port and a flexible memory controller. New modules can easily be
added using the on-chip AMBA AHB/APB buses. The VHDL model is fully synthesisable
with most synthesis tools and can be implemented on both FPGAs and ASICs. Simulation
can be done with all VHDL-87 compliant simulators.

tom0626

Is there Grmon for Linux