Phase-Locked Loops: Design, Simulation, and Applications. 5th Edition

mesmerism · 发表于 2008-7-24 13:23:16

马上注册，结交更多好友，享用更多功能，让你轻松玩转社区。

您需要登录才可以下载或查看，没有账号？注册

x

Contents

Chapter 1. Introduction to PLLs
1.1 Operating Priciples of the PLL
1.2 Classification of PLL Types
Chapter 2. Mixed-Signal PLLs
2.1 Block Diagram of the Mixed-Signal PLL
2.2 A Note on Phase Signals
2.3 Building Blocks of Mixed-Signal PLLs
2.4 PLL Performance in the Locked State
2.5 The Order of the PLL System
2.6 PLL Performance in the Unlocked State
2.7 Phase Detectors with Charge Pump Output
2.8 PLL Performance in the Presence of Noise
2.9 Design Procedure for Mixed-Signal PLLs
2.10 Mixed-Signal PLL Applications
Chapter 3. PLL Frequency Synthesizers
3.1 Synthesizers in Wireless and RF Applications
3.2 PLL Synthesizer Fundamentals
3.3 Single-Loop and Multiloop Frequency Synthesizers
3.4 Noise in Frequency Synthesizers
Chapter 4. Higher-Order Loops
4.1 Motivation for Higher-Order Loops
4.2 Analyzing Stability of Higher-Order Loops
4.3 Designing Third-Order PLLs
4.4 Designing Fourth-Order PLLs
4.5 Designing Fifth-Order PLLs
4.6 The Key Parameters of Higher-Order PLLs
4.7 Loop Filters for Phase Detectors with Charge Pump Output
Chapter 5. Computer-Aided Design and Simulation of Mixed-Signal PLLs
5.1 Overview
5.2 Quick Tour
5.3 Case study: Design and Simulation of a Second-Order PLL
5.4 Suggestions for Other Case Studies
5.5 Displaying Waveforms of Tristate Signals
Chapter 6. All-Digital PLLs (ADPLLs)
6.1 ADPLL Components
6.2 Examples of Implemented ADPLLs
6.3 Theory of a Selected Type of ADPLL
6.4 Typical ADPLL Applications
6.5 Designing an ADPLL
Chapter 7. Computer-Aided Design and Simulation of ADPLLs
7.1 Setting up the Design Parameters
7.2 Simulating ADPLL Performance
7.3 Case Studies of ADPLL Behavior
Chapter 8. The Software PLL (SPLL)
8.1 The Hardware-Software Tradeoff
8.2 Feasibility of an SPLL Design
8.3 SPLL Examples
Chapter 9. The PLL in Communications
9.1 Types of Communications
9.2 Digital Communications by Bandpass Modulation
9.3 The Role of Synchronization in Digital Communicatiolls
9.4 Digital Communications Using BPSK
9.5 Digital Communications Using QPSK
9.6 Digital Communications Using QAM
9.7 Digital Communications Using FSK
Chapter 10. State of the Art of Commercial PLL Integrated Circuits
Chapter 11. Measuring PLL Parameters
11.1 Measurement of Center Frequency
11.2 Measurement of VCO Gain
11.3 Measurement of Phase-Detector Gain
11.4 Measurement of Hold Rangeand Pull-in Range
11.5 Measurement of Natural Frequency Damping Factor, and lock Range
11.6 Measurement of the Phase-Transfer Function and the 3-dB Bandwidth
Appendix A. The Pull-in Process
A.1 Simplified Model for the Pull-in Range 6Wp of the lPll
A.2 Simplified Model for the Pull-in Time Tp of the lPll
A.3 The Pull-in Range 6Wp of the DPll
A.4 The Pull·in Time Tp of the DPll
Appendix B. The Laplace Transform
B.1 Transforms Are the Engineer's Tools
B.2 A laplace Transform Is the Key to Success
B.3 A Numerical Example of the laplace Transform
B.4 Some Basic Properties of the laplace Transform
B.5 Using the Table of laplace Transforms
B.6 Applying the laplace Transform to Electric Networks
B.7 Closing the Gap between the Time Domain and the Complex-Frequency Domain
B.8 Networks with Nonzero Stored Energy at t=0
B.9 Analyzing Dynamic Performance by the Pole-Zero Plot
B.10 A Simple Physical Interpretation of "Complex Frequency"
Appendix C. Digital Filter Basics
C.1 The Transfer Function H(z) of Digital Filters
C.2 IIR Filters
C.3 FIR Filters
References
Index

[ 本帖最后由 mesmerism 于 2008-7-24 13:43 编辑 ]