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数字IC设计资料(IC前端|FPGA|ASIC) 今日: 48 |主题: 26580|排名: 3

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fir滤波器设计参考资料 ...2 3 4	lizhenxing007 2008-11-6	329263	iself 2025-8-16 09:48
[资料] 资料三本 ...2 3	liguchu 2024-5-22	273119	iself 2025-8-16 09:36
[资料] Logic Synthesis for FPGA-Based Mealy Finite State Machines (CRC 2025) ...2 3	2046 2024-11-13	282384	iself 2025-8-16 09:29
[资料] design compiler LAB及其相关资料 ...2 3 4 5 6..21	Jasonszm 2023-6-9	20234295	2609811840 2025-8-15 23:29
[资料] Static Timing Analysis Material ...2 3 4 5	fort2121 2010-8-24	429566	igolaps 2025-8-15 23:08
[资料] Simulation and Synthesis Techniques for Asynchronous FIFO Design	ZhengQC 2025-7-17	8646	skygardon 2025-8-15 21:04
[资料] [ebook]Soft Errors in Modern Electronic Systems ...2 3	pipiw 2010-10-12	218061	fireheart 2025-8-15 19:06
[资料] DMA在微处理器中的应用与设计 ...2	onearangel 2014-7-12	186604	snq31418 2025-8-15 18:49
[资料] cadence+synopsys license 大全 ...2 3 4 5 6..8	taku2006 2013-3-6	7926729	lida123456 2025-8-15 18:48
[资料] Synopsys的license生成器 ...2 3 4	kaprix 2010-5-19	3013263	lida123456 2025-8-15 18:47
[资料] 编码的奥秘-隐匿在计算机背后的软硬件语言(中文版) ...2	ZhengQC 2025-5-9	10818	beckwang1116 2025-8-15 17:43
[资料] Hardware Architectures for Deep Learning @2020 ...2 3 4	2046 2022-10-27	317139	Ralphjh 2025-8-15 16:41
[资料] Xilinx FPGA设计权威指南 Vivado集成设计环境 ...2 3 4 5 6..9	machaokuku 2019-7-16	8529182	yuduqjy 2025-8-15 14:44
accellera systemverilog workshop ...2 3	clarkkevin 2008-10-3	215334	blitzade 2025-8-15 10:48
[资料] 28nm_Timing_Signoff_Guidelines ...2 3 4 5	dboyman 2015-12-31	4612435	blitzade 2025-8-15 10:44
[资料] Hotchips 2021 论文下载 ...2	固执的寻觅 2022-7-3	135190	固执的寻觅 2025-8-15 10:11
[资料] Hardware Accelerator Systems for Artificial Intelligence and Machine Learning @2021 ...2 3 4	2046 2022-11-20	355995	jimcmwang 2025-8-15 01:00
[资料] Design and Test Strategies for 2D/3D Integration for NoC-based Multicore Architectures @2020 ...2 3	2046 2022-11-6	235336	jimcmwang 2025-8-15 00:49
[原创] 《Synthesis of Finite State Machines Logic Optimization》 ...2 3 4	pwang7 2021-11-8	349802	jimcmwang 2025-8-15 00:40
[原创] 《Synthesis of Finite State Machines Functional Optimization》 ...2 3	pwang7 2021-11-8	299486	jimcmwang 2025-8-15 00:25
[资料] verilog 电子书40本打包下载，总有一本适合你有源码 ...2 3 4 5 6..106	megaic 2016-5-7	1056154471	yejingxiaozi 2025-8-14 21:17
[资料] 2014spyglass CDC 培训讲义 ...2 3 4 5 6..36	aurora9325 2014-4-24	35788281	saravanany5k 2025-8-14 20:52
[原创] Prime Time User Guide：2016版本 ...2 3 4 5 6..14	踏燕马 2016-6-17	13986583	saravanany5k 2025-8-14 20:44
asic design guide (600页，注册后才可下载) ...2 3 4 5 6..145	jackzhang 2003-7-17	1443183200	wangwd 2025-8-14 19:13
[资料] 非常好的DC （Design Compiler）学习资料 ...2 3 4 5 6..34	RainskyXiang 2010-10-2	33280635	andersondon 2025-8-14 18:44
[原创] 【数字集成电路设计与技术】(国家集成电路工程领域工程硕士系列教材) 清晰版 ...2 3 4 5 6..52	benemale 2010-6-16	51896328	jyuansea 2025-8-14 18:04
[资料] 《学习VI和VIM编辑器》第７版中文版 ...2 3 4 5 6..8	我没逗你玩儿 2016-3-20	7622205	Ralphjh 2025-8-14 15:34
[原创] samsung 最新 toggle 32GB MLC NAND Flash Datasheet ...2 3 4 5 6	xiaofeixia 2010-12-3	5117476	亦然韩冷 2025-8-14 14:32
[资料] 时序设计与约束资料汇总 ...2 3 4 5 6..11	ray21880 2018-9-19	10331068	chenqi1732 2025-8-14 10:43
[原创] 8-stage Deep-pipelined MIPS CPU(文档、rtl、testbench) ...2 3 4 5 6..7	xileito 2013-1-16	6616782	xileito 2025-8-14 07:30
[资料] Constraining Designs for Synthesis and Timing Analysis ...2 3 4 5 6..35	bingjunpeng 2013-7-13	34685133	saravanany5k2 2025-8-14 02:26
[原创] 直接产生verilog的testbench的python脚本精华3 ...2 3 4 5 6..19	haimag 2012-2-7	18189338	saravanany5k2 2025-8-14 02:21
[资料] IC芯片设计中的静态时序分析实践 ...2 3	ZhengQC 2025-5-9	211549	saravanany5k2 2025-8-14 02:07
TCL和Perl语言经典书籍大集合 ...2 3 4 5 6..18	duweiwei_lydia 2009-8-24	17045807	saravanany5k1 2025-8-14 01:56
[资料] DDR verilog RTL ...2	hqhjj 2011-10-23	196627	saravanany5k1 2025-8-14 01:54

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