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发表于 2008-1-7 23:38:18
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| Creating Assertion-Based IP
Series: Series on Integrated Circuits and Systems
Foster, Harry D., Krolnik, Adam C.
2008, XVIII, 318 p., Hardcover
ISBN: 978-0-387-36641-8
This item usually ships in 2-3 business days
| $129.00
| About this book
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Table of contents
About this book
- Demonstrates a systematic process for formal specification and formal testplanning
- Presents formal testplanning guidelines with examples focused on creating assertion-based verification IP
- Details effective use of assertions languages beyond the traditional language construct discussions
Assertion-based IP is much more than a comprehensive set of related assertions. It is a full-fledged reusable and configurable transaction-level verification component, which is used to detect both interesting and incorrect behaviors. Upon detecting interesting or incorrect behavior, the assertion-based IP alerts other verification components within a simulation environment, which are responsible for taking appropriate action. The focus of this book is to bring the assertion discussion up to a higher level and introduce a process for creating effective, reusable, assertion-based IP, which easily integrates with the user’s existing verification environment, in other words the testbench infrastructure.
The guiding principles promoted in this book when creating an assertion-based IP monitor are:
- modularity—assertion-based IP should have a clear separation between detection and action
- clarity—assertion-based IP should be written initially focusing on capturing intent (versus optimizations)
A unique feature of this book is the fully worked out, detailed examples. The concepts presented in the book are drawn from the authors’ experience developing assertion-based IP, as well as general assertion-based techniques. Creating Assertion-Based IP is an important resource for design and verification engineers.
From the Foreword:
Creating Assertion-Based IP "…reduces to process the creation of one of the most valuable kinds of VIP: assertion-based VIP…This book will serve as a valuable reference for years to come."
Andrew Piziali, Sr. Design Verification Engineer
Co-Author, ESL Design and Verification: A Prescription for Electronic System Level Methodology
Author, Functional Verification Coverage Measurement and Analysis
Written for:
Design and verification engineers; SoC/ASIC design project managers
Keywords:
- Assertion-Based
- Foster
- IP
- Krolnik
- Verification
- integrated circuits
[ 本帖最后由 benemale 于 2008-1-7 23:46 编辑 ] |
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