Contents
ch01 CMOS Processing Flow
ch02 Layout Design Rules
ch03 Analog Layout Consideration
ch04 Layout of MOS Transistor
ch05 Layout of Bipolar Transistor
ch06 Layout of Resistor
ch07 Layout of Capacitor
ch08 Layout of Inductor
ch09 Latch-up
ch10 ESD (Electrostatic Discharge)
ch11 Analog Cells/Macros Layout
ch12 Power Distribution and Signal-Integrity
ch13 Floor Planning of Mixed-Signal IC
ch14 Noise Source of Mixed-Signal IC
ch15 Noise Analysis of Mixed-Signal IC
ch16 Noise Reduction Techniques of Mixed-Signal IC
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