unable to descend into any of the views defined in the view list”spectre cmos-sch schematic veriloga ahdl“ for instance I48 in cell ADC。 Either add one of these views toibrary:xxcell:CNT-13bit ormodify the view list to contain an exsisting view
还没到LVS 仅仅是跑仿真 但是仿真里有veriloga 之前能跑 突然就不行了 求助大佬怎么解决