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本帖最后由 dongshining1 于 2021-5-28 16:19 编辑
恩智浦NXP最近放出来大量职位,涉及前后端及chip leader等职位,senior/juinor均有hire count。
内推相对来说议价主动权更大。
外企福利待遇性价比较高,15天起的年假外加灵活办公,一周两天居家办公,工资股票都还不错。苏州城市也比较宜居。
如果有需要可以加微信 167-3862-6312 先了解一下,或邮箱 sndong100@yahoo.com
后端岗位职责介绍:
Responsibilities
• Work closely with SoC team (architects, logic designers, etc) for chip/block level physical designs.
• Responsible for chip and block level low power definition, RTL synthesis, logic/power equivalent check, clock tree synthesis, P&R, STA/timing noise closure, etc.
• Responsible for die size estimation, floor-plan and power/IR analysis, DRC/LVS, etc.
Requirements
• Bachelor or master degree, majoring in microelectronics, electronic engineering , computer science or relevant disciplines.
• Good knowledge and experience in SoC backend design and EDA tools.
• Script coding ability of C/C++, Perl/TCL, in Linux/Unix environment.
• Excellent communication skills and collaboration spirit.
• Basic knowledge of SoC frontend and DFT is preferred.
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