CDL 转成 Schematic in cadence

peterlin2010

8i8i9o9o 发表于 2019-6-27 19:01
试过了， 还是不行

devMap : nfet nch
propMatch := subtype N
propMap := w w l l m m
termMap :  ?  ?  ?
addProp := model nch
:=  前後須空格

devMap : nfet nch  跟devSelect 有何不同??

cccg

ni.log和ni.err文件里面怎么提示的错误

chengji1999

不错，看看

8i8i9o9o

cccg 发表于 2019-6-28 08:52
ni.log和ni.err文件里面怎么提示的错误

ni.log
############################################

Reference Libraries...
tsmc18
basic
analogLib
temp
###################################
---- Device-mapping enabled ----


1 subckt(s) found in the netlist file.


==========================
        Subckt: DFCND4
==========================

Created the CV DFCND4->netlist_tmp.

#####################################
        MOS Instance: MMI30-M_u2
#####################################

...Searching for a valid mapping in the dev-map file...
        ...did not find a valInitializing from libInit.il for library tsmc18...
   --  tsmcPdkCIW_T-018-CM-SP-012.il
   --  tsmc18_updateCDFs.ile
   --  tsmc18.cxt
   --  tsmcTool2.cxt
Loading Working place Display File '~/projects/analogip/analog/display.drf'
*WARNING* : Not found - D
ated master cellview: mos->symbol in target library temp.
instName->'MMI30-M_u2' is created.
propName->'m'; propVal->'1' is created.
Usage error.

**************************************************************
ni.err

PROCESSING INPUT FILE: netlist
ERROR (CDLIN-47): Failed to find the terminal D in the master cell of instance MMI30-M_u2. Provide the
correct master cell.

8i8i9o9o

peterlin2010 发表于 2019-6-27 22:41
devMap : nfet nch
propMatch := subtype N
propMap := w w l l m m

有空格的