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发表于 2020-8-21 11:45:26
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Since I can't edit my onw post (how I could do that?), I'll explain the process in a new reply.
- Install Exceliumor Jaspergold using Install Iscape. Remember the directory that you selected during the installation.
- Dowunload the archive attached on this post. Extract it.
To patch the software:
- Inside the extracted directory, execute the command ./sfk rep -bylist cadence.pat -nowarn -yes -dir <THE_DIRECTORY_OF_EXCELIUM_OR_JASPERGOLD>. For example, if my installation dir was ~/EDA/SIM/xcellium19/XCELIUM1909, the command will be: ./sfk rep -bylist cadence.pat -nowarn -yes -dir ~/EDA/SIM/xcellium19/XCELIUM1909
- There is an script called cadence_patch.sh that does exactly the same, and the only argument that the script expects is the path of the installation directory. Therefore it can be used as follows: ./cadence_patch.sh ~/EDA/SIM/xcellium19/XCELIUM1909. Use one method or another, bot 2 and 3 does exactly the same.
- Please make sure that the file cadence.pat contains the following strings as is, do not change or edit something if you don't want to screw it up. Do this before running the command in pint 2 or 3.
:binary
/5589E557565381ECD00000008B5508/31C0C357565381ECD00000008B5508/
:binary
/5589E557565381ECD8000000E8000000005B81C3/33C0C357565381ECD8000000E8000000005B81C3/
:binary
/41574989FF415641554154554889CD534489C3/33C0C389FF415641554154554889CD534489C3/
Ignore writting permission errors, there are files that cannot be patched but that doesn't matter. When this is done, continue with the license generation.
License generation:
- You will need Wine with support of 64 bits executables. If you, like myself, are using RHEL7/8 you will need to compile it, because the wine in the yum repos doesn't work for some reason. I'm using wine 5.0 compiled from sources.
- After nstalling wine, just run the following command: wine lmcrypt_cdslmd.exe -i all.dat -o license.dat -verfmt 6 -r
- The file license.dat" is created. Open it, and check that you have the following data in teh first 3 lines of the file:
- The SERVER string followed by your hostname, your host mac and TCP port. If my hostname is "potato" and my mac is 12:34:56:78:91:11, then the first line will looks as follows (the number in red is the port, do not change it): SERVER potato 123456789111 5280
- Second line is the daemon, and should looks as follows (please make sure that you are pointing to the correct cdslmd binary, this is needed for the license server): DAEMON cdslmd $EXCELIUM_INSTALLATION/Linux64/bin/cdslmd
- Finally, the string USE_SERVER, and that's it, the license is just fine:
As an example, see the first 9 lines of my license,dat file, below:
SERVER potato 123456789111 5280
DAEMON cdslmd /home/Titan/Cadence/Formal/Jaspergold/jasper_2017.12p002/Linux64/bin/cdslmd
USE_SERVER
FEATURE 100 cdslmd 1000.000 permanent uncounted 6DC40D3C5C0033286C4A \
VENDOR_STRING=Team_EFA_2006 HOSTID=ANY ck=5 SIGN2="0365 881D \
3CB3 F622 A534 8ACB 6B6B 079F 7151 5CD7 6A46 741D 8966 EFB2 \
45A4 1967 8D58 E093 B0D8 DF3C D7D7 C1ED B438 D158 63F8 5862 \
1F1C 2A74 760B B813"
Finalising:
Finally, add the variable CDS_LIC_FILE to your bashrc (and others that are usefull as well), pointing to the license.dat file:
cat ~/.bashrc:
export CDS_LIC_FILE="/home/Titan/license.dat"
export CDS_AUTO_64BIT=ALL
export CDS_AUTO_32BIT=NONE
export LANG=C
If you are not using bash, but another interpreter such as csh, zsh, etc, just put the same variables in the corresponding file. For example, in zsh is ~/.zshrc
Test it:
Use any test, like this one:
module top;
initial $display("Hello world");
endmodule
Compile and run it:
xmverilog top.sv
See the result:
xmverilog(64): 19.09-s001: (c) Copyright 1995-2019 Cadence Design Systems, Inc.
file: top.sv
module worklib.top:sv
errors: 0, warnings: 0
Caching library'worklib' ....... Done
Elaborating the design hierarchy:
xmelab: *W,DSEMEL: This SystemVerilog design will be simulated as per IEEE 1800-2009 SystemVerilog simulation semantics. Use -disable_sem2009 option for turning off SV 2009 simulation semantics.
Building instance overlay tables: .................... Done
Generating native compiled code:
worklib.top:sv <0x702583a8>
streams: 1, words: 661
Building instance specific data structures.
Loading native compiled code: .................... Done
Design hierarchy summary:
Instances Unique
Modules: 1 1
Initial blocks: 1 1
Writing initial simulation snapshot: worklib.top:sv
Loading snapshot worklib.top:sv .................... Done
xmsim: *W,DSEM2009: This SystemVerilog design is simulated as per IEEE 1800-2009 SystemVerilog simulation semantics. Use -disable_sem2009 option for turning off SV 2009 simulation semantics.
xcelium> source ../EDA/SIM/xcellium19/XCELIUM1909/tools/xcelium/files/xmsimrc
xcelium> run
Hello world
xmsim: *W,RNQUIE: Simulation is complete.
xcelium> exit
TOOL: xmverilog
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