关于Power-On-Reset的问题

yayang

关键要看你的POR的用途。
检测的电源是从芯片外部提供的，还是经过内部的regulator 过来的。根据它们驱动能力的不同，以及负载电容的大小来确定上点速度。

lxc531

:lol:lol

liusupeng

the rising time can be very different when drived using normal power supply or power amplifier. design should consider all cases.

mmic1978

牛人还是很多 啊

prof3

Pls note that a robust POR should be
(1) correct reset regardless of VDD ramping speed(us, ms, even second)
(2) correst reset and release insensitive to VDD glitch or noise
(3) reset pulse width well controlled vs PVT under the same VDD ramping speed.
(4) No power consumption and independent any other block

Pls also note that  POR is very important especially in compex SOC system.  To design a good POR sometimes is even difficult than you design a ADC or other analog block because as you may know, very few papers talking about POR but millions of paper talking about ADC -


hopefully it helps you and gald to hear about your POR is so much robust.

eexygtemp

进来学习一下。。。。

sunblade2000

学习一下

mmic1978

   

原帖由 prof3 于 2009-3-6 06:40 发表

                               
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Pls note that a robust POR should be
(1) correct reset regardless of VDD ramping speed(us, ms, even second)
(2) correst reset and release insensitive to VDD glitch or noise
(3) reset pulse width we ...

   Thank you !!!  强人啊

vera_lyh

kan kan

wshy

不错呀。感觉很难