Cadence Verilog-XL 详细使用手册(中文)

GavinChang

谢谢分享

a1032077316

谢谢分享

浩然若枫

好东西，收了，多谢LZ

neter

感謝樓主的分享...

woftever

verilog—xl和nc—verilog都用不了，下来看看能不能得到解决

ra3d

多谢楼主！

lwxinxi

阿法士大夫按时按时

dndxytj

assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1

小慈

学习学习········

UCCC

文件在哪啊