Cadence Verilog-XL 详细使用手册(中文)

woftever

verilog—xl和nc—verilog都用不了，下来看看能不能得到解决

ra3d

多谢楼主！

lwxinxi

阿法士大夫按时按时

dndxytj

assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1assign enrc_posedge = enrc_syn1 & (~enrc_syn2);
  assign pulse_posedge = pulse_syn1

小慈

学习学习········

UCCC

文件在哪啊

myron109203

谢谢楼主提供

bearboy

谢谢分享

tonkie

感谢楼主

carneval

谢谢谢谢