大概是这么写的
module lightwater(
input [0:4]sw,
input clk,
output [0:7] led
);
reg [0:32] clkn=0;
reg [0:4] clkn2=0;
reg clk_10hz;
reg clk_1hz;
always @ (posedge clk)
begin
clkn<=clkn+1;
clk_10hz<=(clkn<5000000)?1'b0:1'b1;
if(clkn>10000000)
clkn<=0;
end
always @ (posedge clk_10hz)
begin
clkn2<=clkn2+1;
clk_1hz<=(clkn2<5)?1'b0:1'b1;
if(clkn2>9)
clkn2<=0;
end
always @ (sw)//从左往右
case(sw)
5'b11110:
begin
led=8'b0000_0001;
end
5'b11101:begin
led=8'b1000_0000;
end
5'b11011:begin
led=8'b0001_1000;
end
5'b10111:begin
led=8'b1000_0001;
end
5'b01111:begin
led=8'b0000_0000;
end
default :led=8'b1111_1111;
endcase;
always @(posedge clk_10hz)
case(sw)
5'b11110:
begin
if(led==8'b1000_0000)
led=8'b0000_0001;
led=8'b1000_0000;
end
5'b11101:
begin
if(led==8'b0000_0001)
led=8'b1000_0000;
led=led>>1;
end
5'b11011:
begin
if(led==8'b1000_0001)
led=8'b0001_1000;
led[0:3]=led[0:3]<<1;
led[4:7]=led[4:7]>>1;
end
5'b10111:
begin
if(led==8'b0001_1000)
led=8'b1000_0001;
led[0:3]=led[0:3]>>1;
led[4:7]=led[4:7]<<1;
end
default: led=8'b1111_1111;
endcase;