vivado的一个implementation warning

linghuqiubai

工具用的vivado，所有的输入差分信号实现时都报了类似如下的错误：
[Drc 23-20] Rule violation (PORTPROP-2) selectio_diff_term - The port sys_clk_n[0:0] has an invalid DIFF_TERM property value. For the target architecture, IOSTANDARD value DIFF_SSTL15 does not support on-chip input differential termination. The DIFF_TERM property value will be ignored.
[Drc 23-20] Rule violation (PORTPROP-2) selectio_diff_term - The port sys_clk_p[0:0] has an invalid DIFF_TERM property value. For the target architecture, IOSTANDARD value DIFF_SSTL15 does not support on-chip input differential termination. The DIFF_TERM property value will be ignored.



不知道到底是什么原因，要怎样修改？

zhangweizhuang

字面意思理解，应该是输入的差分时钟使用了输入匹配电阻。建议检查一下差分模块例化参数和约束文件

linghuqiubai

回复 2# zhangweizhuang

找到了，我之前对于IBUFGDS的例化里有DIFF_TERM这个参数：


IBUFGDS #(

.DIFF_TERM("TRUE"),

.IBUF_LOW_PWR("TRUE")

) IBUFGDS_inst2 (

.O(clk_in_buf),

.I(clk_p_dram),

.IB(clk_n_dram)

);


把.DIFF_TERM("TRUE")改成"FALSE"后就不报错了。


谢谢！