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If you have any interest in the position, please send your bilingual resume as
attachments to dmliu@synopsys.com
1\Job title: (Sr./Staff) OPC R&D
Location: Shanghai/Beijing
Job Description:
Investigate and analyze the challenges and opportunities in the areas of design for manufacturability (DFM) with emphasis in exact and fuzzy pattern matching, geometry manipulation for the lithography applications on optical proximity correction (OPC) and resolution enhancement techniques (RET).
Propose and implement solutions for these challenges and work with other groups within Synopsys. Candidate with knowledge on optical lithography is a plus.
Requirements:
Master or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Science is preferred.
The individual should have at least 5 years of experience in development of complex software projects, is familiar with C/C++ coding with a strong background in data structure and algorithms.
It is essential that the individual has a strong desire to learn and explore new technologies and is able to demonstrate good analysis and problem solving skills.
The exceptional candidate will have prior knowledge and experience in computational geometry, image processing, or EDA tool development
2\Job Title: CAE _Mask Synthesis/OPC
Location: Shanghai
Description:
This job position of Mask Synthesis/OPC CAE is to drive the adoption of Synopsys DFM technologies by demonstrating improvements in the customer's design and manufacturing process.
The Mask Synthesis/OPC CAE is an expert in applications spanning semiconductor design to silicon implementation.
Interaction with customers and internal development is required to develop and deploy manufacturing EDA tools through photomask generation. In addition the MS CAE aids internal and external customers in the development of production flows using lithography and process extension / simulation tools for OPC, PSM, simulation based verification, and other reticle enhancement techniques (RET).
Communicates customer and market needs to R&D, develops integrated flow solutions for specific customer needs.
The ideal candidate will be an experienced, versatile individual with a wide span of skills to successfully perform in this key position.
Requirements:
Includes; 2-3 years Semiconductor/Mask Design, or 2-3 years Lithography wafer process, Mask/Etch Process Engineering.
Excellent communication and organizational skills are required.
Experience with wafer lithography and other IC fabrication techniques is necessary, and the scripting experience with any language is required.
OPC tool usage and rigorous photolithography simulation experiences is a plus.
Bachelor or master degree - Optics and Physics-related background, with programming experience, or Master degree in EE/CS and Semiconductor or Mask Design/Engineering Experience. |
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