[AMD社招] 资深数字后端设计 -- 名额即将close

zz_zhang0911

本人是技术面试官，不用担心求职信息外泄。因为是急招，名额随时会close，希望大家珍惜机会。
中国区这边，PD现在的机会非常好，在技术的广度和深度上比其他在华外资要好；在薪资上也会给到很有竞争力的薪资。
ps: 关于裁员问题，中国区裁的很少，而且裁的都是非核心业务。另，我想真正有实力的人是“求裁”的
如有兴趣或希望了解详情，请发简历至：zz_zhang0911@163.com

估计是最后一轮的名额，这次开的名额要求经验较高

Job-description:
1. Handles physical design of very large dGPU chip, including: fullchip floorplan for huge chip (hierarchy top-down flow), full chip power/clock distribution, full chip timing/PV/power/lec analysis, timing/congestion very critical block implementation and etc.
2. Co-work with global expert using the newest process/technology and the most advanced method in each step of back-end design.

Requirement:        

1. BS 8+ or MS 5+    2. famialr with APR, digital (or Analog, or custom) design, low power implementation, STA, power analysis and etc. Or expert in some of them. 3. familiar with CAD tool (Synopsys/Candence/Mentor): dc/icc/pt/caliber/encounter/ETS/red-hawk/spice/..., or expert in some of them.
4. Proficient in perl/tcl/csh is a plus.
5. Knows about process/DFM issue below 28nm is a plus.
6. Knows about rtl/DFT/synthesis design is a plus.



另：还有少量PD2（MS1+ ）或NCG（2015应届毕业生）名额，也是很快就会close

zz_zhang0911

名额即将close。。。