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[招聘] Cadence上海Principal Application Engineer-数字后端

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发表于 2015-9-30 15:28:17 | 显示全部楼层 |阅读模式

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Position Description:

To provide key technical support in digitalIC design implementation, product demonstration, and sales presentations.

To demonstrate strong ability and to behands-on in RTL-to-GDSII design methodology, for challenging low power designs,for 200MHz to several GHz big chips.

Have real design experience includingconformal check, logic synthesys, P&R, CTS, SSTA, MMMC to close timing,power and die area.


Assist in technical evaluation, assessmentand delivery of concurrent ASIC/SoC designs.

To play a leading role among other teammembers, while receive little instruction on routine and general assignments.

  

Position Requirements:

A bachelor's degree is essential and 7+years experience in IC design, electronic engineering or computer scienceapplications.

Ability to understand and articulatetechnical issues, (and knowledge of) design products and their applications.

Requires working knowledge of one or moreprogramming languages, and effective communication and soft skills.

An MS degree and/or working experience inmulti-nation IC design house is a plus.


简历请发送至Cadence HR: cecilyl@cadence.com

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