[paper]A Low Noise Figure 1.2-V CMOS GPS Receiver

teradyne

This paper presents the designed and measured
performance of a Global Positioning System (GPS) receiver
chain integrated as a part of a multi-band and multimode
receiver, designed for global system for mobile
communications (GSM) and wideband code division multiple
access (WCDMA). Adding an additional mode to a receiver
with minor changes to the implementation is discussed. The IC
is implemented in a 0.13-µm CMOS technology without any
analog options. At 1.2-V supply voltage and total power
dissipation of 49 mW for the analog signal path, the proposed
GPS receiver features a noise figure of 2.2 dB.
additions and changes to the circuitry. As a result, the GPS
receiver demonstrates the state-of-the-art performance with
low power consumption. This paper is structured so that the
system requirements and architecture of a GPS receiver is
presented in Section II. In Section III, the needed changes to
the different building blocks are presented. Measured
performance and conclusions follow in Sections IV and V,
respectively.

fanjx

good good thanks

yuncic

支持一下！分享！

jimfly

thanks

basildy

basildy

:victory:

pansouthline

谢谢了,是不错的东西