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发表于 2013-8-6 10:59:57
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本帖最后由 peterlin2010 于 2013-8-6 11:15 编辑
time variator Resistor 先前TRY 過
如下
Vs 1 0 30V $ this is just a 30V dc source
Rs 1 2 5 $ 5 ohm series resistance
Xr 2 0 3 var_res $ this is our variable resistance
Vc 3 0 pwl(0,0 10,5 ) $ this is the control voltage = 10V this makes
$ the variable resistance a constant 10 ohms
* subcircuit definition
.subckt var_res plus minus control
Gpm plus minus VOL='v(plus,minus)/v(control)'
Rcontrol control 0 10k
.ends var_res
.op
.tran .01 10 0 .01 uic
.probe tran v(1) v(1,2) v(3) rxr=par('v(2)/i(xr.rcontrol)')
.probe tran i(rs)
.end
Cap 還沒去TRY 過 ..
pspice 到是有看到
pspice time variator Cap
.subckt capacitor + - params:VC0=0
.dunc C(time) {TABLE(time,+0,5nF,1ns,10nF,1us,10nF,1us+1ns,5nF)}
Ec + - value={(std(I(Ec)) +VC0*C(0))/C(time)}
.ends
pspice Value => 換成 hspice VOL=
try 看看 ..
Modeling time-varying storage components in PSpice .pdf
(58.36 KB, 下载次数: 19 )
OR
.SUBCKT varcap 1 2 ctrl
R1 1 3 1u
VC 3 4
EC 4 2 VOL=('(1/v(ctrl))*v(int)')
GINT 0 INT VOL='I(VC)'
CINT INT 0 1
.ENDS
x1 n1 0 vc varcap
vcs vc 0 pwl(0,10u,5)
vds v1 0 pwl(0,0 1u,10)
rs v1 n1 100k
.tran 1n 20u uic
.probe tran v(vc) i(rs)
.end
TRY ..我不確定是否能用 |
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