请教下DAC的DNL, INL仿真问题

tsai2

you can use vector give dac code

zhjjwzz

请大大高手给个仿真用的verilog-a的程序，谢谢！

owen70080

所以到底要怎麼測DNL INL

xiaosha921

我很想知道，希望大牛人指点啊

xiaosha921

不要用Verilog,在Cadence中怎么测INL和DNL 啊，O(∩_∩)O谢谢

anchaoqun

mixed sig ic test and measument这本书上的程序可以测试INL和DNL

alexjoy

可以一看

onedaybemyself

关注……

血徒

最近测试很头疼

fhchen2002

Several ways to appraoch

0. derivation of INL and DNL by analytical equations (not exactly simulation)

1. 100% behavioral simulation by MATLAB, focusing on the impact of device mismatch to INL/DNL.
In the MATLAB code, the critical components are assigned with random variables.
Multiple simulations are needed since each time, the INL and DNL will be different.

2. SPICE circuit simulation without mismatch taken into account (given corret clock and appropriate settling time, the calculated INL and DNL should be very small (e.g., DNL < 0.1 LSB for DNL, INL < 0.5 LSB).

3. SPICE circuit simulation with mismtach taken into account (i.e., Monte Carlo simulation)

For case 2 and case 3, an ideal ADC (model) is needed.