CYCLONEII_SAFE_WRITE 设定无效?

nono2000

Error (176029): Memory block
**********altsyncram:altsyncram_component|altsyncram_v882:auto_generated|ram_block1a0 uses a global signal on its clock-enable1 port.  This is not allowed for this family.


参数设置（SETTINGS_DEFAULT PA**ETERS）中添加一个名（NAME）为 CYCLONEII_SAFE_WRITE、值（DEFAULT SETTING）为VERIFIED_SAFE的参数

nono2000

Memory block <name> uses a global signal on its clock-enable1 port. This is not allowed for this family.
       

(ID: 176029)
CAUSE:         Design contains one or more memory blocks that use a global signal on the clock-enable1 port of the RAM and there is not legal routing support for this configuration.
ACTION:         Change the signal source of the clock-enable1 port to use no control signal or a non-global control signal.